Samsung’s New Exynos M3 Processor Is an Ultra-Wide Mobile Monster

Samsung’s New Exynos M3 Processor Is an Ultra-Wide Mobile Monster

For the past few years, one company has dominated single-thread performance in the ARM ecosystem: Apple. While companies like Qualcomm, Samsung, and MediaTek aggressively pursued higher core counts, Apple stuck to its guns, cranking out higher single-thread performance cores and sticking to a dual-core configuration for its high-end iPhone processors. But Apple might be facing new competition in the single-core performance championships, courtesy of Samsung’s new M3 processor and the Samsung Exynos 9810 SoC.

Samsung Goes Wide(r)

The original M1 and follow-up M2 were already wide designs, capable of issuing four instructions per clock cycle, compared with the 3-wide (Cortex-A72) and two-wide (Cortex-A73) designs that ARM is using. It could dispatch and execute up to nine instructions per clock cycle. Despite these strengths on paper, the M1 and M2 didn’t distinguish themselves compared with top-end ARM cores, implying that Samsung had some optimization still to do on the architecture. (This is not particularly surprising for a first effort.)

The new M3 doubles down on width, boosting its front-end fetch, decode, and rename stages up to six instructions per cycle, according to Anandtech. That’s a 50 percent boost compared with its previous efforts, and makes the M3 one of the widest mobile architectures, comparable to some of Apple’s own work. The total number of pipeline stages has grown, from 13 to 15, and the reorder buffer has grown enormously, from 96 entries to 228. As Anandtech notes, this is all part of Samsung’s effort to make sure its new enormous core gets fed properly.

Samsung’s New Exynos M3 Processor Is an Ultra-Wide Mobile Monster

This new CPU core also sports twice the load units, sharply reduced integer division latency, double the integer multiplication throughput, a threefold increase in simple floating point performance, double the FPU division throughput, and a host of other changes that should make the M3 a force to be reckoned with. The L2 cache size is as high as 512K and backed by a 4MB L3.

All of this horsepower feeds the Exynos 9810, an SoC with four Samsung M3 cores at up to 2.9GHz, backed by four Cortex-A55 cores clocked at 1.8GHz. In short, this chip is a beast.

Careful of the Apple Trap

Apple’s battery woes are an example of what can happen when a company pushes the envelope too far in mobile products. We’ve spoken to a number of different sources in the past month about Apple’s battery shutdown issue, and the general opinion is that the company’s decision to aggressively push single-thread performance, along with its relatively small battery capacities, caused this problem. While it’s absolutely true that all batteries will degrade over time, an SoC that put less peak demand on the battery will not degrade it as quickly. Spreading workloads out across more cores, with lower per-core performance, may help prevent the issue.

Samsung, however, doesn’t seem to think the M3 will pose a problem at all. If the company brings its new SoC to US markets, we may get to see how an aggressive single-thread CPU from a company other than Apple handles this issue with a larger battery. Of course, that assumes Samsung’s M3 can best other competitor CPUs from Qualcomm and ARM, but we’re hoping it can. It’d be interesting to see another high-end custom ARM architecture enter the race.