New MRAM Breakthrough Could Revolutionize CPU Designs
Historically, covering changes to the mainstream memory market (loosely defined as SRAM for CPU caches, DRAM for volatile RAM, and a mixture of SSDs and HDDs for non-volatile storage) has been a bit of a letdown. It’s interesting, on the one hand, to see how various niche approaches have developed and the strengths and weaknesses they offer compared with the “typical” approach. On the other, these alternative, niche technologies are typically niches for a reason. The reasons vary depending on the technology, but they’re typically defined by one or more weaknesses that keep them from supplanting the more mainstream method. True breakthroughs that upend the competitive situation are rare — but if Spin Transfer Technologies (STT) is telling the truth, that’s exactly what it’s brought to market.
Historically, magnetoresistive RAM has offered excellent performance, data retention, and endurance — just not all at the same time. At top speed, MRAM is nearly on par with SRAM as far as performance — but the write currents required to sustain these speeds degrade the memory itself, leading to unacceptably short lifespans. Higher write currents are positively correlated with better data retention, but also lead to high power consumption. This has been a substantially limiting factor on adoption of the standard — it’s historically been hard to find mainstream compute scenarios where MRAM offered an acceptable alternative to SRAM when it comes to CPU caches, even though it has other theoretical density and power consumption advantages that could make it a good fit for these markets.
Today, STT is announcing a new breakthrough the company dubs Precessional Spin Current. STT claims this new approach will increase spin-torque efficiency of an MRAM device by 40-70 percent, allowing for retention times that are as much as 10,000x higher than before. A data retention of an hour is now over a year according to this new method — while simultaneously reducing the write current. Here’s how the company describes it:
The PSC structure is a breakthrough because it effectively decouples the static energy barrier that determines retention from the dynamic switching processes that govern the switching current. As a result, when the PSC structure is added to any pMTJ, benefits include:
The PSC structure was designed from the outset to be modular and fabricated with any pMTJ — either the company’s own pMTJs, or a pMTJ from other sources. The PSC structure is fabricated during the pMTJ deposition process and adds approximately 4nm to the height of the pMTJ stack. The structure is compatible with a wide range of standard MRAM manufacturing processes, materials and tool sets — enabling any foundry to readily incorporate the PSC structure into existing pMTJ stacks without adding significant complexity or manufacturing costs.
So how does this potentially impact the design of future processors? One advantage of MRAM is that you can cram 4x-5x as much MRAM into the same space as an equivalent amount of SRAM. While the performance characteristics of MRAM aren’t quite as favorable as SRAM, we’ve already seen interest in specific markets for alternative memory technologies, as witnessed by the use of NAND flash as server RAM. There are scenarios in which a larger, but very slightly slower, cache could be far more effective than the current systems we use today, particularly for applications which aren’t particularly latency sensitive. A large on-die MRAM cache might serve as a useful way to improve integrated graphics performance without blowing power curves or die size, for example.
We spoke to STT, who told us their near-term plan is to focus on SRAM replacement rather than DRAM, due to MRAM being a better intrinsic match for SRAM at this point in its evolution. The company hopes to complete customer validation by the second half of this year and to bring product to market by mid-2019. We’re not quite willing to call this competition in favor of MRAM altogether, but companies like AMD and Intel are absolutely looking for ways to improve device performance and reduce power consumption. As the value of new nodes declines over time, the impact of alternative technologies like MRAM become proportionally greater.
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