Nearly four years ago, Intel announced a major shift in its overall silicon strategy. Instead of simply focusing on x86 cores, or even developing a line of specialized many-core accelerators like Xeon Phi, the company would also bring a Xeon CPU to market with an FPGA (field-programmable gate array) integrated directly into the die.
Intel has talked up this shift before, as Anandtech notes, including some product demonstrations, but always behind closed doors or under very restricted circumstances. The Xeon Scalable Gold 6138 is already an existing CPU, and the x86 silicon on the 6138P looks to be identical between the two parts: A 20C/40T CPU, with a 2GHz base clock, 3.7GHz boost, with 6 channels of DDR4 support. The PCIe lane count is different — 48 lanes on the base 6138 compared with 32 lanes on the 6138P — but this almost certainly means that 16 of those PCIe 3.0 lanes have been diverted for bandwidth for the FPGA.
The integrated Arria 10 GX 1150 has 1.15 million logic elements, 53Mb of embedded memory and, according to Anandtech, is priced at “Arm, Leg” with an estimated TDP between 190W – 200W. Given that the non-FPGA 1138 is a $2,600 CPU, that pricing seems accurate. The Xeon CPU connects to the FPGA with 160Gbps of bandwidth per socket, and the configuration may be limited to two-socket systems or below.
Maximum TDP is 255W, which is high but not extraordinary. Some of you may recall that AMD’s Piledriver FX-9590 was rated for a 220W TDP, and our discussions of the topic with high end CPU cooler vendors has implied that the upper limit for how much heat you can dissipate without using water cooling is probably around ~250W in a conventional CPU socket. Of course, these are LGA3647 CPUs, which means they’re designed for a very large CPU socket and a hefty cooler — and Intel could always theoretically design to an explicitly higher TDP target if it wished.
In its announcement, Intel writes:
Fujitsu, a lead partner, plans to deliver systems based on the Intel® Xeon® processor with integrated FPGA and Intel’s OVS reference design. They are making the Intel® virtual switching reference design even more robust for the networking environment through their reliability, availability, and serviceability (RAS) with performance monitoring and debug assisting functions.
Intel also claims that the 6138P delivers “up to 3.2x the throughput with half the latency and 2x more VMs” when compared with the basic 6138 with “software OVS (Open Virtual Switch) DPDK forwarding in the CPU userspace application.”
For now, Intel is clearly keeping its FPGA capabilities separate and confined to a small segment of products rather than rolling it out as an inexpensive way to make FPGAs more affordable. Whether the company will stick to this plan or gradually expand its integrated CPU + FPGA offerings is still unclear, but if the segment proves important to Intel’s overall fight for positioning in the AI/ML space, you can bet we’ll start seeing more Xeon silicon with Arria FPGAs onboard.
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