ARM Kills Its RISC-V FUD Website After Staff Revolt

ARM is under fire for the way it attempted to kneecap a fledgling open-source hardware project, and has retreated from its own line of attack after several days. ARM had launched a website, riscv-basics.com, which purported to offer “real” information on the rival ISA. As one might expect, the “information” on display was a bit less neutral than a visitor might hope for. Taking this kind of shot against an open-source hardware project also struck many in the OSS community as being in exceptionally poor taste, given how critical open source software has been to ARM’s overall success and visibility.

First, a bit of background: RISC-V is an open-source ISA based on RISC principles and is intended to eventually provide flexible CPU cores for a wide variety of use-cases. By using the BSD license, the RISC-V teams hope to allow for a greater range of projects that support both open and proprietary CPU designs. RISC-V CPUs are already available today in a range of roles and capabilities. Despite some modest initial success, RISC-V, today, isn’t even a rounding error in CPU marketshare measurements. It’s certainly no threat to ARM, which enjoys the mother of all vendor lock-ins measured in per-device terms.

ARM’s riscv-basics.com website (now offline, but preserved in the Internet Archive) was incredibly well-named, but not for the reasons the company had in mind. It’s a bog standard example of how marketing can be used to sow FUD — fear, uncertainty, and doubt — while simultaneously damning a target with the faintest of praise. The fact that it featured a prominent ad for ARM at the bottom is the gauche-flavored icing on this basic cake. From the site:

Point #1 admits that RISC-V is free — but rushes to assure the reader that the cost of licensing “any RISC ISA” accounts for a small fraction of the total design-to-delivery investment required to create a commercial processor.” The RISC-V’s ISA flexibility and the ability for vendors to add private extensions for their own personal products (#3) is recast as a risk that could make it harder for an ecosystem to form.

This is a hilarious point for ARM to try and raise. You want to talk fragmentation? Let’s talk about fragmentation:

Everything inside the red box is an architecture ARM currently ships. I’m certain that you can still find some the older ones being shipped as well, even if that isn’t ARM’s recommended practice.

There’s nothing wrong with fine-tuning the capabilities of a given architecture variant to the specific features of the hardware it runs on. In fact, when I asked ARM about it several years ago, the company told me this practice was an important way to maximize the performance and power efficiency of every square millimeter of silicon. And yes, it’s true that allowing vendors to run roughshod over a standard in the name of writing their own customized solutions can cause real problems, which is why rules need to be set up to keep things neat and well-maintained. But implementation flexibility is a feature, not a flaw, and ARM absolutely knows it. In the x86 world, features like L2 cache and built-in floating point units have been universal for nearly two decades. In the ultra-low-power market, it makes sense to offer chips that lack these options — and to build ISAs that cater to those customers.

ARM backed down from its own FUD because of the implication that it was launching attacks on open source as a whole, The Register reports. But in launching the attacks in the first place, ARM put the world on notice. It’s worried about RISC-V — certainly more worried than we would’ve guessed it ought to be, given that RISC-V is still quite young. As own-goals go, this one was spectacular.

Feature Image: Yunsup Lee holding RISC V prototype chip, Flickr

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