When AMD announced the 3rd generation of Ryzen products (Matisse) at CES last week, it also showed a bare shot of the actual CPU package. The CPU layout shows that there’s clearly room for another chiplet on-package, just below the I/O die. (AMD has separately hinted that it has plans for this handy bit of empty space, but has given no details.)
When AMD announced that it would shift to a chiplet design and a central I/O die, the company discussed how it could potentially use chiplets for functionality besides additional CPU cores. In theory, specialized processing blocks, including a GPU, could be attached in this manner as well.
Anandtech has received confirmation from AMD that it will not bring an APU to market based on the Matisse design in 2019. This doesn’t mean AMD has no plans to bring a 7nm APU to market — only that the CPU in question will be a custom design. Because APUs are intended to serve lower-priced markets, AMD makes different design decisions concerning them and tends to position them for different markets.
It’s not clear, at this point, what the future holds for AMD’s APUs. Back in the Kaveri era, when AMD added support for GDDR5, it seemed as though the company might attempt to bridge the eternal divide between iGPU and dGPU with a specialized line of APUs with much higher memory bandwidth than normal. Rumors of AMD’s Tarnhelm (canceled) implied something similar, with discussions of a top-end APU with integrated HBM memory. In fact, given that HBM is one of only a few ways of delivering large amounts of memory bandwidth in-socket without inflating motherboard costs by using additional RAM channels, it once seemed likely AMD might utilize that RAM standard to turbo-charge its integrated graphics.
What ultimately happened was a bit more prosaic. AMD’s integrated GPU performance has continued to advance and improve, courtesy of Vega’s GPU improvements and DDR4, which delivered an overall bandwidth boost. The adoption of DDR5 (expected in 2020 – 2021) will deliver another overall improvement. Thus far, however, the only HBM-equipped product with an integrated CPU has been Intel’s Hades Canyon, and that SoC uses Intel’s EMIB interconnect rather than a 2.5D interposer.
In other news, AMD has stated it expects the TDP range of Matisse products to be the same as the current lineup of Ryzen CPUs. This implies CPU TDPs ranging from 35W to 105W. It is not clear if that applies to the theoretical bit of empty space or not. Maintaining full socket compatibility with AM4 is important for AMD’s long-term compatibility pledge, but squeezing a high-performance 16-core CPU into a 105W TDP while maintaining high clock speeds might be a bit tricky. Then again, there’s clearly room for something. We’ll have to wait and see.
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