Meet RDNA: AMD’s Long-Awaited New GPU Architecture

When AMD launched Graphics Core Next (GCN) back in 2012, few would have predicted that this GPU architecture would rule the company’s graphics products for nearly a decade. GCN was an effective design for Team Red in many ways — it was instrumental to the success of the Xbox One and PS4 console businesses — but it’s grown long in the tooth. High clocks were always challenging for AMD to hit on GCN and AMD has been unable to match Nvidia on overall power efficiency since 2013. Only the Radeon Nano — a high-end GPU built with energy-efficient HBM and binned for best-in-class power consumption — was reasonably close to matching the energy efficiency of Nvidia’s Maxwell products.

If Navi delivers the improvements AMD has promised, it’ll be the company’s most important GPU launch since 2012. Let’s take a look at what the company has brought to the table.

The high-level overview. Navi (or at least, the RX 5700XT flavor) contains 40 CUs with 64 cores each, with 160 texture mapping units and 64 ROPS. Vega 64, for reference, is a 4096:256:64 design. Given that AMD is predicting Navi will be 1.14x faster than a GTX 1080, and Vega 64 tends to be about 8 percent back from that card, this suggests the Radeon 5700XT will outperform the Vega 64 by about 1.2x.

This image summarizes the changes introduced with RDNA. RDNA allows wavefronts to be executed in blocks of 32 rather than 64. A wavefront is a group of operations executed on a single SIMD. Previously, AMD only used Wave64.

The use of the phrase “CU” to describe this core allocation seems rather odd. AMD is labeling the part this way, with 64 cores per CU, but look at how the diagram above is actually laid out. Each of the red blocks contains 32 subdivisions. This is also true of the GCN blocks, but in that architecture, certain features like the scheduler were shared between the blocks. In RDNA, these capabilities are now specific to each set of SIMD units, and multiple CU units can be ganged together to process workloads in certain cases if the compiler feels this will deliver a performance improvement. We’ve inquired about this to AMD (the initial briefings were extremely compressed, with limited time for questions).

Architectural Deep Dive

In the slides below, we’ll dive into Navi in more detail. Each slide can be clicked on to open it in a new window.

Here's how GCN issues instructions. Work is executed every four clocks, distributed across all four SIMD groups. Scalar instructions can be executed every four clocks.

RDNA functions in a very different manner. Work can now be issued and executed every cycle in a Wave32 (a smaller grouping than Wave64).

Here's an example of instructions pass through the GPUs. GCN takes significantly longer than Navi to execute in Wave32 mode. Even Wave64 workloads can be handled with far fewer issue cycles.

Another method of examining the same data flow. In theory, Navi's CU utilization should be much higher than GCN's.

Additional detail on the SIMD units. Width has been doubled, with better instruction arbitration, prefetching, and dedicated scalar and instruction units.

AMD has moved to Wave32 as a way to support higher performance in games and improve overall execution efficiency. Wave64 is still supported for workloads where it's useful.

The new RDNA cache hierarchy. The L1 cache has been rearchitected to reduce latency and power consumption. L2 cache congestion has also been reduced.

The net impacts of these improvements and the difference in overall implementation. There's far more load bandwidth available to the ALUs from L0. Cache latencies have also been substantially improved. Note: Cache and memory latencies are not normally a major problem on GPUs.

Delta color compression has been implemented throughout the uarch and the algorithm is now more efficient. This should yield benefits, particularly when Navi comes to APUs with limited memory bandwidth.

In normal asynchronous compute, the asynchronous engines cannot completely halt the graphics pipeline. Navi can. The asynchronous engine can pause the rest of the card to prevent work from being scheduled while it finished its own computational tasks.

These improvements are where Navi derives its collective major benefits, shown below:

The overall performance per clock has improved by 1.25x, according to AMD, while the number of gates per clock has dropped. Power efficiency has improved substantially, with claims of a 1.5x improvement over GCN.

A relatively small percentage of the total benefit of Navi is attributed to 7nm silicon, and AMD did not explain where it spent the chip’s transistor budget in any detail. Navi is somewhat larger than Polaris, but features only a few more cores (2,560 versus 2,304). Presumably, some of the transistor count went towards boosting clock rates, which are significantly higher than AMD GPU has ever reached. The RX 580’s maximum clock speed is roughly 1340MHz, compared with 1755MHz quoted for Navi’s game clock. That’s a 1.3x improvement.

Non-Architectural Considerations

AMD spoke often from the stage at E3 about the need for a “Zen” effort to put its GPU business back on track, but there’s one critical difference between the two situations: time.

If you date AMD’s Zen efforts from its decision to hire Jim Keller to the launch of the product, it took from August 2012 to April 2017 to design, build, and launch the hardware. Prior to Zen’s success, AMD’s R&D budgets were operating on a shoestring. The company had to choose where to spend its money from 2012 – 2017, and it chose to invest that cash in building a better CPU. Any funds for increased GPU development would have come from two sources: funding from Microsoft and Sony in exchange for design work on the Xbox Next/PS5, and additional sales from Ryzen products. GPU cryptocurrency sales may have provided an additional source of revenue in late 2017 and early 2018, but AMD could not have planned on that happening when it laid out its R&D plans several years ago. Remember, AMD never released a new high-end desktop CPU architecture from 2012 – 2017. Navi is launching less than two years after Vega.

Based on the data AMD has shown to date, Navi won’t cleanly close the gap between itself and Team Green in terms of absolute power efficiency. This is not without precedent. After AMD’s disastrous misfire with the HD 2000 series, it leaned on the HD 3000 family to give it performance parity in the midrange and upper-midrange market. The HD 4000 family were the GPUs that actually put the company back on top. It could be that Navi is the first step towards better, more competitive performance for AMD, rather than the final word on the topic. There’s been some chatter about whether RDNA represents a new architecture, but it certainly seems to. The chip has been fundamentally overhauled, it handles workloads very differently than the previous core, and it shakes off some of the defining traits of GCN, including its clock limitations.

It is entirely possible that, as with Zen, AMD chose to incorporate the first wave of improvements in a GPU core it knew it could bring to market quickly, with additional enhancements and improvements intended for Navi 20, which is still rumored to arrive next year. The company’s 7nm power and efficiency story could continue to advance at a relatively rapid clip if this is true.

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