Intel’s Manufacturing Roadmap Shows a Return to Regular Cadence Through 2029

Intel’s Manufacturing Roadmap Shows a Return to Regular Cadence Through 2029

One major topic of discussion at the IEEE International Electron Devices Meeting (IEDM) this week has been the future of process nodes at 5nm, 3nm, and below. At present, there are just three manufacturers building on the leading edge — Intel, Samsung, and TSMC. ASML initially released a slide showing Intel’s roadmap at the conference this week, but while the bulk of the information presented in the slide was accurate, ASML had added dates to the slide that Intel didn’t originally put there.

The original slide we’ll be discussing, as presented by Intel:

Image by Intel
Image by Intel

The altered version created by ASML and initially published by Anandtech as part of their coverage of this topic:

Image by Anandtech
Image by Anandtech

ASML’s version of the slide takes the implied relationship between process nodes and when these nodes will be introduced and makes it explicit, assigning each new node to a specific upcoming year and naming the improvements from 10nm down to 1.4nm. ASML’s modifications to the slide aren’t crazy, but it’s important to draw the distinction between what Intel has explicitly said and what it hasn’t.

According to Intel, the 10nm node it’s shipping today is already 10nm+, with 10nm++ being used as the basis for 7nm development. 10nm+ is available in 2019, 10nm++ is coming in 2020, and 10nm+++ arrives in 2021. While Intel is developing 10nm++ and 10nm+++ it’ll simultaneously be preparing to deploy 7nm, which also launches in 2021 with Intel’s datacenter Xe GPU. The implication here is that Intel may use different process nodes for different product lines into the indefinite future, as opposed to migrating its entire product family over to the same node in stages over time.

The “backport opportunity” refers to a capability Intel is engineering into its products going forward, to help avoid a logjam like the one that choked the company on 10nm. There have been rumors for years that Intel would backport certain features to 14nm products even if they were originally intended for 10nm. The goal with explicit backporting is to make certain that features designed for a 7nm CPU could instead be deployed on a 10nm+++ CPU if 7nm faces further delays. We’ll have to see what the practical impacts of this capability are; it’s obviously the kind of feature Intel would prefer not to use in the first place.

Server and mobile chips would evolve through 10nm+ and 10nm++, while Intel potentially backports some of the features it’ll introduce in these families to its current line of 14nm products. We’ve been hearing rumors on this front for at least a year, and there’s a conspicuous spot on the desktop roadmap where 10nm chips ought to sit in 2020, but currently don’t. If Intel needs time to get its 10nm up to snuff in terms of yield or clock for desktop, it could do worse than improving the feature set on its 14nm CPUs.

According to Intel’s slide, it’s currently developing the technology it needs to bring 7nm online, defining the characteristics of 5nm, and exploring further R&D options for integration at 3nm and what ASML has labeled as 1.4nm, which could theoretically appear in 2029. Intel is pledging to deliver the equivalent of a full node’s worth of improvements as each node improves, in much the same way as 14nm++ has significantly better performance characteristics than Intel’s 14nm. Whether the company can keep these timelines remains to be seen, but Intel’s official position appears to be that its 10nm logjam was a one-time affair.

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