AMD has made several new platform and chip announcements as part of its five-year celebration of Ryzen. While Ryzen didn’t launch until March 2, 2017, AMD is evidently counting the anniversary from when it debuted in December of 2016, and kicking off celebrations a few months early.
AMD’s Director of Technical Marketing, Robert Hallock, sat down with John Taylor, who is AMD’s Chief Marketing Officer, for an in-depth conversation about Ryzen and the future of AMD. The conversation touched on a number of specific points regarding AMD’s upcoming product announcements and a few general points worth discussing further.
Hallock confirms in the video that AMD will launch two major products next year — an AM4-based refresh for Zen 3 with V-Cache, and a new platform with support for features like DDR5 and PCI Express 5.0. Hallock specifically refuted rumors that AMD would stick to PCIe 4.0 for its AM5 platform. AMD will continue its emphasis on backwards compatibility by supporting AM4 CPU coolers on the upcoming AM5 platform, so folks who have invested in high-end Ryzen coolers won’t have to replace them when the new CPUs arrive.
The AM4 Ryzen CPUs with V-Cache that are expected to launch in early 2022 are likely analogous to the Ryzen 3000 series XT CPUs that AMD launched a few months before the Ryzen 5000 CPU family debuted. Hallock and Taylor again reiterated that V-Cache delivers a targeted 15 percent upgrade in gaming. Benefits to other workloads were not discussed, but a fair number of applications should benefit from the larger L3 cache.
These CPUs will likely serve as a high-end swan song for the AM4 platform, and they’ll provide end users who built AM4 platforms within the last few years with one last CPU upgrade if they want a performance boost without having to buy a new motherboard and RAM.
AMD Dismisses the Need for Hybrid CPUs
AMD also discussed what Zen means to the company during its video, and how the company has engineered its CPUs to deliver excellent performance and power efficiency. In response to Intel’s upcoming Alder Lake CPUs, which embrace a hybrid approach that mixes big and small cores, Hallock said AMD does not believe it needs to go this route.
“Every silicon company is thinking about what that next generation of power efficiency looks like. Mixed cores is one approach,” Hallock said. “The Android ecosystem took that a long time ago, but the way we plan to do it is going back to our roots… We built a core that’s physically much smaller than what other companies were building in x86 land. When you pack that together with process leadership, packaging leadership like chiplets or 3D V-Cache, when you pack that in with new firmware work we’re doing, we can drive to much, much lower power profiles than we’re even at today. We are the power efficiency leader today. We can keep doing that.”
AMD isn’t claiming it won’t ever build a hybrid CPU, but the company doesn’t believe it needs to do so at the moment to compete with Intel. It might be right. There’s a lot we don’t know about Alder Lake yet, and even the desktop debut won’t tell us everything about how the laptop version will perform. AMD will deliver its upcoming Zen 4 on a 5nm process, compared to Alder Lake’s 10nm SuperFin process, so AMD’s lead in the process race will likely come with its own attendant set of benefits and improvements. Lithography gains aren’t what they used to be, but they’re still worth something.
There’s an interesting fight brewing here between two different x86 design philosophies at the same time that x86 itself is facing renewed competition from Apple. AMD is betting that its chiplet design philosophy, process node leadership, and the strength and flexibility of the Zen CPU core can collectively compensate for the benefits Intel will get from purpose-built high-efficiency cores. Given the reality of semiconductor timelines, we’ll see Intel’s opening “argument” later this year, followed by AMD’s Zen 4 in 2022 — likely in the back half, if the company is bringing Zen 3 + V-Cache CPUs to market during the first part of the year.
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