Intel Delays Broken 10nm Into 2019, Hires Jim Keller to Fix It

Last year, Intel told investors and the press that it had begun early shipments on 10nm, though it refused to identify which parts this applied to, or when we would see volume shipments. Similarly, the company declared its 8th Generation Core family would comprise multiple chips across 14nm, 14nm+, 14nm++, and 10nm. Now, Intel has announced that it will delay volume shipment on 10nm into 2019, rather than ramping in the first half of 2018.

Here’s the quote from CEO Brian Krzanich:

We continue to make progress on our 10-nanometer process. We are shipping in low volume and yields are improving, though the rate of improvement is slower than we anticipated. As a result, volume production is moving from the second half of 2018 into 2019. We understand the yield issues and have defined improvements for them, but they will take time to implement and qualify. We have leadership products on the roadmap that continue to take advantage of 14-nanometer, with Whiskey Lake for clients and Cascade Lake for the data center coming later this year.

Krzanich then argues that these delays are more-or-less business as usual, and that Intel is still delivering real gains following Moore’s Law. He states:

For example, 14-nanometer process optimizations and architectural improvements have resulted in performance gains of more than 70 percent since the first 14-nanometer products were launched. We combine these advances in manufacturing technology and architecture to produce truly leadership products. And it’s that product leadership that ultimately matters most to our customers and end users.

Under questioning, Krzanich acknowledged that the difficulties with 10nm are related to not having EUV to use yet, but claimed that Intel still has “process and performance leadership,” and again stated that the company had done “70 percent improvements” to 14nm over its lifetime. He also argued that Intel’s 10nm problems were related to its aggressive scaling — something that may well be true, given that Intel did set aggressive 10nm targets. But with respect to Brian Krzanich, that 70 percent improvement figure isn’t something Intel is going to be able to keep duplicating, and it’s not clear that it’s a useful data point in this context. The slideshow below contains information on Intel’s 10nm node that the company has previously revealed; though obviously we now expects these parts no earlier than 2019.

This slide summarizes why Intel wants a different metric for process nodes. Even compared to the "other" 14nm, its transistor density is still 1.23x higher. Note: We do not know which specific process nodes at Samsung or TSMC were compared against Intel's products.

Underlying Intel's argument for the continuation of Moore's Law is that its 10nm will be a larger improvement on its 14nm transistor density than any previous generation.

The same graph as the previous slide, but with raw numbers on transistor density instead of scaling points.

In terms of transistor gate pitch, 20nm and first-generation 14nm/16nm were roughly comparable to Intel's 22nm node. A later 14/16nm product has improved on that metric but still lags Intel's three-year-old node.

The pure-play foundries compare better against Intel in metal pitch scaling, but they still don't match Intel's 14nm, much lets its 10nm target. Again, they're projected to deploy 10nm at something closer to Intel's 14nm.

The pure-play foundry business is expected to exceed Intel's 14nm transistor density once they build 10nm products in volume, but Intel believes its 10nm density will be significantly better.

There are two interesting things on this slide. First, it confirms that Intel *will* deploy a 14nm++ node, as previously rumored, and that its first generation 10nm won't offer equal performance. Today's Kaby Lake customers will have to wait for 10nm++, expected in ~2020, to see transistor-level performance improvements above and beyond what Kaby Lake offers.

The 70 percent gain that Intel is talking about appears to be related to its decision to finally ship higher core counts in mobile. We’ve mapped the overall progression from 5th Generation Core (Broadwell, first-generation 14nm) to 8th Generation Core (Coffee Lake, 14nm++) below, with a Kaby Lake 7th Gen chip tossed in for comparison’s sake.

Intel absolutely got some clock improvements courtesy of its evolved 14nm process — the Core i7-7650U is clocked 1.14x higher than the i7-5650U, and peak single-core frequencies are significantly higher on the 8th Generation chip compared with OG 14nm. 8th Generation reviews and benchmarks also suggest that the switch to quad-cores resulted in substantially higher performance within a similar battery life, making these parts a win for Intel all the way around. Well and good.

But there are limits to how many cores you can pack into a CPU while keeping the frequency high, no matter how aggressively you tune your process. Stepping up to a six-core mobile chip wouldn’t get Intel the same size increase (it’s an intrinsically smaller gain, in percentage terms), and it would come with tighter limits on minimum and maximum clock. It’s also likely that Intel, which had no initial plans to iterate on 14nm for three generations, has largely tapped out the improvements it can squeeze from the node.

Evaluating Intel’s Explanations

On the one hand, everything Krzanich said on the conference call makes perfect sense. As we’ve written before, node shrinks have become more difficult as geometries have gotten smaller. Not having EUV available means semiconductor firms must use strategies like multi-patterning, and multi-patterning makes lithography costs explode. Intel’s claim to have a path to 7nm without EUV was always a little dubious, so it’s not surprising to see the company struggling at 10nm. And while TSMC and Samsung have both been shipping 10nm for quite a while, Intel’s 10nm node targets feature sizes that correspond to what the pure-play foundries are targeting for 7nm. One can persuasively argue that it took TSMC, GF, and Samsung years to match Intel’s feature sizes, rather than the reverse (Intel 14nm ≈ Foundry 10nm).

On the other hand, Intel launched 14nm back in 2014 with 10nm forecast for late 2016 or early 2017. Then that schedule slipped back to 2018. Now it’s slipped back into 2019. Krzanich can talk up Intel’s improvements to 14nm, but none of that changes the fact that the company has never needed five years for a node transition before. And even now, Intel isn’t willing to say it’ll launch on 10nm in H1 2019 — it’s only saying “2019.” Intel’s decision to hire former AMD Zen designer Jim Keller away from Tesla and install him as a senior VP in charge of silicon engineering also implies the company is looking to reassure investors that its 10nm ramps have its full attention. But regardless, we’re now talking about whether Intel can match its competitors on feature sizes, not whether it’ll continue to lead the industry.

It’s unclear how these delays will impact Intel’s efforts to deal with a resurgent AMD. We’ve already heard rumors that the company is prepping an eight-core Coffee Lake — that could be the Whiskey Lake hardware Intel previously mentioned. AMD’s Ryzen 2 is supposed to debut next year on 7nm, though we’re not sure how well GF is executing on its own node ramps. Intel hadn’t intended to ramp 10nm for desktops initially, so the delay may not have much impact on the desktop space. But delaying 10nm on mobile will make it easier for ARM vendors and AMD’s own Ryzen Mobile parts to compete in that space throughout 2018.

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Intel Delays Broken 10nm Into 2019, Hires Jim Keller to Fix It

Evaluating Intel’s Explanations

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