A class-action lawsuit against AMD alleging that the company misrepresented the capabilities of its Bulldozer and Bulldozer-derived product lines will proceed to trial after a federal district judge opted not to dismiss it out of hand. While US district judge Haywood Gilliam’s decision is not a judgment in favor of the plaintiffs, it does certify the class-action suit and allow it to proceed.
The argument, from plaintiffs Tony Dickey and Paul Parmer, is that AMD “misrepresented the number of core processors in its ‘Bulldozer’ line of central processing unit… Plaintiffs allege that the Bulldozer CPUs, advertised as having eight cores, actually contain eight ‘sub-processors’ which share resources, such as L2 memory caches and floating point units (‘FPUs’).”
I wrote about this lawsuit back when it was filed in 2015 and my opinion hasn’t changed in the intervening 3+ years. That article also deals with the specific claims Dickey made against AMD in his original case and why they were variously inaccurate or inapplicable. In this case, AMD’s counter-claim that “a significant majority interpret ‘core’ in ways that are fully consistent with AMD’s chips,” was deemed an insufficient reason not to certify the class lawsuit.
Bulldozer did not support SMT, which allows a CPU to execute more than one thread simultaneously. The fact that performance scales upwards in integer and FPU workloads on a BD/PD processor when moving from four threads to eight is proof that the CPU is not limited to a functional four-core arrangement. As these results from OpenBenchmarking.org show, BD performance improves above the four-thread mark, even in FPU workloads. Integer workloads also show improvements in scaling from four threads to eight. While the absolute degree of scaling may be less, Bulldozer is not a functional quad-core CPU as a matter of defined core count. The fact that its overall performance may have been equivalent to an Intel quad-core has nothing to do with whether the CPU factually had the advertised number of cores.
It’s absolutely true that Bulldozer’s scaling factor was about 20 percent lower than a “true” multi-core design. It’s also true that AMD’s BD architecture was, for better or worse, unique. It shared resources in a different way than other CPUs on the market and its overall level of performance didn’t match what many enthusiasts wanted. A Bulldozer CPU core was different than a Thuban CPU core, or an Intel CPU core from an equivalent Core chip. The problem is, they aren’t nearly different enough to justify arguing that AMD had misused the word core, and the claims the plaintiffs make do not withstand technical analysis.
Consider, for example, the difference between Bulldozer/Piledriver and the Sony Cell Broadband Engine that powered the PS3. No one would argue that Cell was a conventional eight-core processor (seven cores were enabled for the PS3). It combined a fairly standard PowerPC CPU core (the PPE, or Power Processing Element) with up to eight SPEs (Synergistic Processing Elements). These SPEs were distinctly different from conventional CPU cores, with only limited access to small local memory pools and no hardware resources for branch prediction. Deep dive articles on Cell are available at RealWorldTech, for those interested in a trip down memory lane.
Sony didn’t explicitly market the PS3 as an eight-core system to my recollection, yet according to the most basic definition of the word — namely, being the part of the CPU that performs calculations based on received instructions — the SPEs of the Cell Broadband Engine would still qualify as cores. In this case, Sony recognized that the technical differences between the CBE and other more mainstream chips were significant enough to use different labels for the components of the chip. But that nod to consumer understanding, while absolutely the right thing to do, doesn’t mean that we can’t call the SPEs “cores.”
Did Bulldozer share an FPU? Certainly. So did the Sun UltraSPARC T1 (one FPU per chip) and T2 (one FPU per core, but shared by up to eight threads). The lawsuit claims that sharing L2 caches and FPUs means that AMD violated the commonly understood definition of “core,” yet Intel chips have shared L2 caches since the Core 2 Duo days. And therein lies the problem. We could certainly define a CPU core based on the underlying capabilities of the relevant components to act as a general purpose microprocessor without assistance — something Cell’s SPEs cannot do. This type of division would establish a more meaningful differentiation. Attempting to draw a line through a chip in the manner that this lawsuit does, however, is impossible. If Bulldozer’s cores aren’t cores, neither are the cores in other CPUs.
Unlike Cell, any single Bulldozer core was capable of running all of the workloads that eight Bulldozer cores were capable of running. Performance clearly scaled with access to additional threads, and other CPU designs from other companies that clearly marketed themselves based on core count were available at a variety of performance levels on a per-core basis. There’s a potential way to draw a distinctive definition out of all this, but you wouldn’t do it using the characteristics advanced by the plaintiffs in this lawsuit.
Dickey and Parmer may be angry that they bought eight-core CPUs that didn’t perform like eight-core CPUs from Intel. That doesn’t mean Bulldozer wasn’t an eight-core chip. Having a certain number of cores does not guarantee a given level of performance.