Samsung Unveils 3nm Gate-All-Around Design Tools

At its Samsung Foundry Forum this week, Samsung declared that its Product Design Kit for 3nm chips is now in alpha, having reached the 0.1 development milestone. Samsung is planning to launch a plethora of process nodes in the coming years, with development tracks planned for 7nm, 6nm, 5nm, 4nm, and yes, 3nm.

For the 3nm node, Samsung will introduce a new, evolved transistor architecture. Since Intel launched its 22nm process, high-performance CPUs and GPUs have used FinFETs (TSMC, Samsung, and Globalfoundries all offered FinFET designs when they launched their 16nm and 14nm process nodes). The 14nm, 10nm, and 7nm nodes have all used FinFETs — vertical “fins” above the formerly 2D channel structure, which increase the contact area between transistor channel and the gate.

There are two ways to build this new, gate-all-around (GAA) structure — nanowires and nanosheets. Nanowires are difficult to build but optimal for low-power. Nanosheets are believed to have advantages as far as performance and scaling are concerned, and Samsung will use this approach for its 3nm node. It’s calling this design an MBCFET, which stands for Multi-Bridge Channel Field Effect Transistor.

I want to take a moment to discuss how foundries communicate the advances they expect from process nodes, as this came up recently in a discussion with you folks in relation to AMD, TSMC, and node improvements. Here’s what Samsung’s PDF says:

Compared to 7nm technology, Samsung’s 3GAE process is designed to provide up to a 45 percent reduction in chip area with 50 percent lower power consumption or 35 percent higher performance. (Emphasis added).

Now, compare that with the company’s slide deck:

The most logical way to read the slide is “3nm increases performance by 35 percent while reducing power by 50 percent and area by 45 percent compared to 7nm.” The use of commas, without a qualifier, implies that these benefits are being delivered alongside each other, not that two of them are in opposition to each other.

We’re not accusing Samsung of anything untoward here, because honestly, we’ve seen this kind of slip multiple times from multiple companies. For decades, these kind of statements were often “and” statements. As it’s become more difficult to deliver performance and power improvements, we’ve seen companies adopt a variety of strategies. Sometimes, multiple core designs are used in the same SoC to optimize power consumption. Some companies have chosen to remain on older process nodes, or have begun staggering their adoption cycles. AMD and Nvidia skipped 20nm for GPUs and both companies used an optimized 16/14nm design dubbed 12nm rather than moving to the 10nm process node used by Apple and Samsung several years ago.

The improvements for 3nm compared to 7nm are fairly good, but this node won’t actually ship for quite some time. Here’s the progression as communicated by Samsung in the same slide deck.

This shows how the company expects each of its current design lines to evolve and, somewhat by extension, how it expects its current customers to move. Samsung hasn’t spelled out exactly what the distinction between each of these nodes is, or which paths it expects particular customers to take, but we do know certain aspects of the nodes. 8nm, for example, explicitly doesn’t use EUV, while 7nm does. The company claims to offer “four FinFET-based processes from 7nm down to 4nm that leverage extreme ultraviolet (EUV) technology, as well as 3nm GAA or MBCFET.” This phrasing is somewhat ambiguous and implies that Samsung might offer both GAA (nanowires) and MBCFET (nanosheets).

Samsung led the foundry world in the 14nm transition but lost that crown to TSMC at 10nm. Unlike TSMC, it opted to deploy EUV on its 7nm node from Day 1. To-date, it has not publicly announced winning any major customers like AMD or Nvidia for future products, though it did ink an agreement with IBM to build future POWER processors. The company has set an aggressive timetable for itself and clearly intends to slug it out with TSMC for overall market leadership.

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