Apple, TSMC On Track to Move 3nm Into Risk Production by the End of 2021

Apple, TSMC On Track to Move 3nm Into Risk Production by the End of 2021

A new report indicates TSMC’s 3nm process node is still on track, with plans to move into risk production in 2021. Apple is said to have already locked in most of TSMC’s early 3nm capacity.

Multiple sites are repeating the idea that this represents an acceleration of TSMC’s previous roadmap. This is not true. Data the company presented at ISSCC in February 2021 aligns with the information presented at HotChips in 2020, namely: 3nm is on-track for risk production in 2021, with volume manufacturing to follow in 2022. “Risk production” is when a foundry begins building hardware on a new node, but is still ironing out the kinks. Low yields are expected. Volume production is when the chip is ready to ship to customers en masse. There’s typically a 6-12 month lag between risk and volume production depending on the specifics of the node and overall foundry timelines.

First, here’s the slide TSMC showed back in August:

Apple, TSMC On Track to Move 3nm Into Risk Production by the End of 2021

Now, here’s an updated slide from ISSCC 2021 with information on what kind of improvements to expect from the 5nm –> 3nm node shrink.

Apple, TSMC On Track to Move 3nm Into Risk Production by the End of 2021

From 7nm to 5nm, the estimated improvements to performance and power scaling fell, while the die density improvements remained steady. This is also projected to be the case for 5nm, except the performance gains will shrink. Power consumption improvements, at least, will nudge upwards a bit. Massive density gains without equivalent power consumption improvements are not all that great, but they do represent the continued scaling of Moore’s law.

Apple, TSMC On Track to Move 3nm Into Risk Production by the End of 2021

TSMC believes that product optimization and moving forward in the “More Than Moore” era requires the simultaneous leveraging of advanced 3D packaging technologies, the extensive use of co-optimization strategies that consider every aspect of the SoC including its expected software workloads in the development process, and the traditional lithographic technology improvements that were historically responsible for moving the needle with minimal help needed from anyone else.

While TSMC and other manufacturers are still keeping a lot of discussion focused on lithography, 3D packaging and interconnect are both areas we increasingly hear discussed when power improvements and performance gains are mentioned. Expect to see these areas play a role in future TSMC improvements as well.

TSMC’s risk production is said to target 30,000 wafers per month, while volume production is supposedly 105,000 per month. The capacity increase from one to the other is only about 3.5x, but risk production wafers also have much lower yields. The total difference in hardware availability isn’t just in terms of wafer starts but how many of those wafers yield good die.

We had heard rumors of 3nm issues back in 2020, but it looks as though the company is confident it solved them, if they were true to begin with. If TSMC goes into risk production with 3nm at the end of 2021, we’d expect it to ship the node for revenue in September or October of next year, when Apple launches the next iPhones.

Image Credit: Peellden, Wikimedia Commons, CC BY-SA 3.0

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