It’s Not ‘Too Late’ for Intel to Beat the Apple M1

Earlier this week, some slides leaked with purported details on Intel’s Arrow Lake. This chip is still some years away — it’s currently Intel’s 15th Gen part (we’re on 12 at the moment). The leak suggests that Intel’s Arrow Lake will feature a GPU with 320 execution units on a GT3 integrated part. Assuming Intel sticks with eight ALUs per EU, that’s 2560 GPU cores on a GPU likely based on Intel’s upcoming Battlemage or Celestial products.

There’s only so much we can glean from a leak like this, but according to 9to5Mac, it’s already too late for Intel. They write:

Of course, Intel may succeed in beating Apple’s M1 chip, but it’s too late now. Until the company can ship the next generation of Intel processors, Apple will be about to release the third generation of its Apple Silicon chip for Macs, which will certainly be even more efficient and powerful than the current M1 and any chip made by Intel.

The implication here is that even if Intel can compete with the M1 by 2023 with Arrow Lake, it won’t be enough to compete with the second or third-generation products Apple will inevitably launch. For simplicity’s sake, we’ll refer to those chips as M2 and M3. These are speculative names and have not been confirmed by Apple.

It is far too early to be drawing these kind of conclusions.

Current and Future Technology Trends

The current M1 Max has a 512-bit interface to main memory that provides a tremendous amount of bandwidth to the SoC. Apple’s decision to integrate a large GPU on-die made sense, given that the company has no market for discrete graphics cards and no reason to build them for itself. There’s nothing else like it on the consumer market. It’s likely Apple will retain this unified bus for future products. Apple could grow its effective memory bandwidth by making the bus wider or by increasing RAM clock. The new LPDDR5X standard supports transfer rates up to 8533Mbit/s.

Intel might integrate its GPU on-die in a similar fashion, or it might opt for large L3 caches, on-chip HBM, or quad-channel memory interfaces. Alternately, the company might choose to emphasize its discrete cards for high-end performance while its laptop and desktop chips target more modest markets. Apple is a vertically oriented company without a market for discrete components. Intel serves a very different role.

We can assume that the 2560 GPU cores on Arrow Lake will be more efficient than anything Intel has in-market today, but GPU core counts can’t be compared between manufacturers and Intel’s future chips might include more than 8 ALUs per EU. The future GT3 GPU partition is the size of a midrange GPU today. Intel has been more generous with GPU cores on its mobile chips than its desktop processors, but 2560 GPU cores would be a significant scale up from its current chips.

The CPU configuration in this top-end chip reportedly pairs six high-performance cores with eight efficiency cores. We don’t know how much faster Arrow Lake will be compared to Alder Lake. We can safely assume Intel will target an IPC uplift of between 1.05x and 1.15x each generation. That suggests Arrow Lake will be 1.10x – 1.32x faster than Alder Lake, clock-for-clock. It’s true that the Apple M1 has a substantial efficiency advantage over Intel and AMD in many workloads. That doesn’t mean it’s too late for the x86 manufacturers to catch up.

The Slow Pace of Semiconductors

There’s a quote attributed to Robert Palmer, former CEO of Digital, that summarizes semiconductor design cycles very well:

Building semiconductors is like playing Russian roulette. You put a gun to your head, pull the trigger, and find out four years later if you blew your brains out.

Everything in the semiconductor industry takes time. It takes 2-3 years to bring a new fab online. Building a new CPU microarchitecture from scratch takes 3-5 years. It also typically takes 2-3 years for a foundry to transition from one major process node to the next. Intel launched its mainstream mobile Alder Lake CPUs last week. The leaked slide above was made no later than week 17 of 2021.

AMD will introduce Zen 4 later this year, but the CPUs that will become Zen 5 and Zen 6 are already in-development. Assuming the leaked Intel slide above is genuine — and it might not be — Arrow Lake’s specs and capabilities were already being nailed down well before Alder Lake’s launch. Intel and AMD are competing today with microarchitectures they likely began building between 2018 and 2019.

As one example: AMD’s Zen 3 CPUs were designed from the beginning to be upgraded with large, vertically mounted L3 caches. The Ryzen 7 5800X3D will be the first CPU to use the feature, but AMD was including the necessary TSV (through-silicon via) holes on-silicon 18 months ago. Alder Lake may use a big.Little-like arrangement (Intel calls this hybrid core), but Intel didn’t build Alder Lake as a response to the M1. Intel first talked about hybrid core CPUs with Lakefield, which it demoed to the press in late 2018.

The M1 Responses Aren’t in Market Yet

The slow pace of semiconductor design cycles means we haven’t seen Intel or AMD’s silicon response to the Apple M1 yet. That’s not the same thing as saying neither company has responded. Intel chose to feature an MSI G76 Raider laptop for the Core i9-12900HK launch because it knew the laptop would narrowly beat the M1 Max in a range of benchmarks. AMD and Intel respond in real time to each other, but their choices are constrained by manufacturing and microarchitectural decisions made 2-4 years previously. Intel is targeting the M1 on absolute performance because Alder Lake is fast enough to do so. Intel’s engineers have not taken the M1 as their target for where Arrow Lake needs to be in 2023 – 2024.

Insurmountable advantages in semiconductor manufacturing are hard to come by and harder to keep. Companies can — and do — mount startling comebacks. AMD all but died before roaring back to life with Zen in 2017. Intel’s problems at 10nm led some investors to declare the company should sell its fabs. Alder Lake’s strong performance and power efficiency have put Intel in an excellent position against AMD once again.

The argument that Apple has achieved some kind of insurmountable advantage over x86 rests on the idea that ARM itself possesses an intrinsic advantage over x86. This is a very old argument with its roots in the ancient battle between RISC and CISC. It’s reignited as ARM and RISC-V have become more prominent.

Even if ARM or RISC-V replaced x86, that wouldn’t necessarily mean the end of Intel or AMD. Both companies have built ARM CPUs before and both hold ARM architectural licenses.

The Long-Term Threat of the Apple M1 Family

The danger of the M1/M2/M3 is not that x86 customers will decamp en masse for ARM. The danger is that Apple will siphon off some of x86’s power users and expose x86 as a second-tier ISA as far as performance and performance per watt. Today, CPUs like the Core i9-12900HK may be modestly faster than Apple’s SoC, but Intel’s top-end chip consumes nearly 2x more power to do it. Clearly there are gaps that need closing.

But AMD and Intel won’t face that threat by targeting the M1. They’ll face it by aiming Core and Zen CPUs towards where they expect Apple’s M2 or M3 to be. We won’t find out how effective they’ve been until 2023 or even 2024 depending on launch cycles. The PowerPC versus x86 comparisons of the late 1990s offer an instructive comparison here.

Apple didn’t switch away from the G5 in 2005 because of a single mistake or problem with the PowerPC family. IBM’s inability to build a mobile G5 or close the clock speed gap with x86 was the icing on the cake. The performance gap between Intel and IBM had been growing for years, even as Apple adopted the G3, G4, and G5 in succession. The M1 is not a threat because it, specifically, will steal tremendous market share from Intel and/or AMD. The M1 is a threat because it might be the vanguard of a long-term assault on x86’s premium price. But it’s not ‘too late’ for Intel to catch up. AMD’s own success is testament to how silicon fortunes can change with the arrival of new microarchitectures.

Feature image by Fritzchens Fritz

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